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配置型號包含以下特性:
Digital DesignBER Testing 2G-12GB/s請參考資源中的資料文檔或查看產品總覽。
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Supports bit error rate measurements optimized for high-speed 400 GbE and next-generation 800 GbE interfaces.
Key Features
PAM4 Target Applications
Item | Specification |
Operation Rate (PAM4/NRZ) | 2.4 Gbaud to 32.1/58.2/64.2 Gbaud (option selection) |
No. of Channels | 1 |
Output Amplitude | 70 mVp- to 800 mVp-p (Single-end) 140 mVp- to 1600 mVp-p (Differential) |
Offset | -2 V to +3.3 V |
Emphasis | 4 Tap, -20 to +20 dB |
Channel Emulator | Generates waveform with insertion loss and simulates waveform with corrected insertion loss Set by loading S-Parameter file (S2 P, S4 P) |
ISI | Simulates ISI generation waveform Set using loss (–8.00 to 8.00 dB) at CEI-specified Nyquist frequency Used in combination with channel board, such as J1800A/J1758A (optional accessories parts), or Noise Module MU195050A |
Independently Variable PAM4 3 Eye | 20 to 50% (PAM4 Amplitude 0/3 level = 100%) |
PAM4 Pattern | SSPRQ, PRBS13Q, PRBS31Q, RS-FEC, etc. |
PAM4 Pattern Error Addition | MSB Error, LSB Error, LSB&MSB Error, RS-FEC Symbol Error |
Tr/Tf (20 to 80%) | 8.5 ps (typ., NRZ) |
Random Jitter | 170 fs rms (typ., NRZ) |
I/O Connector | V (f) |