配置型号包含以下属性:
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4 GHz (250 ps) timing zoom with 64 K memory
1.0 GHz / 500 MHz (half / full-channel) conventional timing with deep memory
500 MHz transitional timing
State clock rates up to 450 MHz
Data rates: up to 500 Mb/s
Automated threshold/sample position setup for accurate measurements on high-speed buses
Simultaneous eye diagrams on all channels identify problem signals quickly
68-channels per module, combine up to 5 modules for 340 channels
Selectable memory depths: 1 M, 4 M, 16 M, 32 M 16911A Options
Compatible with 40-pin logic analyzer probes. Probes are ordered separately.
Compatible with 16900 Series modular logic analyzers
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