State Analysis (Synchronous Sampling) | State clock rates up to 450 MHz
Data rates: up to 500 Mb/s
Automated threshold/sample position setup for accurate measurements on high-speed buses
Simultaneous eye diagrams on all channels identify problem signals quickly
|
Configuration Considerations | 68-channels per module, combine up to 5 modules for 340 channels
Selectable memory depths: 1 M, 4 M, 16 M, 32 M 16911A Options
Compatible with 40-pin logic analyzer probes. Probes are ordered separately.
Compatible with 16900 Series modular logic analyzers
|